Research

In a conventional accelerator, fetching a weight from memory costs far more energy than the multiply-accumulate that uses it, so efficiency is bounded by data movement rather than arithmetic. Compute-in-memory removes that movement by performing the multiply-accumulate inside the memory array, accumulating partial sums along bitlines or in the charge domain. I work on SRAM-based macros, where 7T and custom bitcells decouple reads from computation and on gain-cell eDRAM, whose 3T and 4T cells offer higher density and logic-process compatibility at the cost of limited retention and refresh. The open questions are mostly at the boundaries: the peripheral ADCs (in case of analog CIM) that can dominate macro energy and area, sensitivity to device mismatch, voltage and temperature, the trade-off between analog accuracy and digital determinism, and how to map sparse workloads onto arrays so that computation, just like a neuron, happens only when the input changes.

Intracortical arrays now record from hundreds of channels at tens of kilosamples per second, producing data rates that no implantable wireless link can carry within its power and heat budget. The answer is to move the decoder into the implant. I design digital front-ends that extract compact neural features directly in silicon: spike-band power, band-limited local field potentials and cross-regional phase synchrony computed in the logarithmic domain to avoid costly multipliers. Lightweight yet complex classifiers with online update mechanisms then turn those features into decisions on chip. The design problem spans the whole stack: choosing features that stay informative as electrodes drift and tissue responds, quantising them aggressively without losing accuracy, sharing hardware across channels through time-multiplexing, and keeping the full pipeline within a few hundred microwatts. This line of work has produced MiBMI, a 2.46 mm² chipset decoding 31 classes of handwritten characters for brain-to-text communication and a 196 µW logarithmic SoC for brain-network connectivity and adaptive classification of psychiatric states.

The brain performs its computation on roughly 20W while training a frontier model consumes energy on the scale of gigawatt-hours. Landauer's principle sets the minimum cost of erasing one bit at $kTln2$, about $2.87 \times 10^{-21}$Joules at room temperature and conventional CMOS logic operates many orders of magnitude above that floor. Most of the energy is not in arithmetic but in data movement: Mark Horowitz showed that a 32-bit DRAM access costs a few hundred times more than a floating-point addition. How far can compute-in-memory, near-threshold operation, asynchronous event-driven logic and reduced-precision arithmetic close the gap and which of them survive variability, noise and process scaling? For bio-integrated systems, the constraints tighten further. An implant must stay within strict tissue-heating limits, cannot rely on a replaceable battery and must communicate through lossy, heterogeneous tissue. What are the efficiency limits at this scale? Can backscatter and impulse-radio links deliver high neural data rates within the power budget or must the implant compress and classify on chip? And at the scale of billions of edge devices, how do we design for decades of operation, reconfiguration and recyclability rather than replacement?

David Marr (neuroscientist) separated any information-processing system into three levels: the computational problem, the algorithm and its physical implementation. For the brain, we have detailed implementation data, competing algorithmic hypotheses and no consensus on the computational level. Is the brain performing approximate Bayesian inference, predictive coding or free-energy minimisation; and are these distinct theories or one idea in different notation? Sparse coding explains receptive fields in early vision; does a single efficiency principle extend to memory, planning and abstraction? Backpropagation solves the credit assignment problem, but requires weight transport and non-local error signals that neurons do not appear to have. Do biologically plausible alternatives such as feedback alignment, equilibrium propagation or three-factor Hebbian rules converge to the same solutions, and at what cost in sample efficiency? Current models need on the order of trillions of tokens; humans generalise from a handful of examples. Is that gap explained by inductive bias, by embodiment and active sampling, or by a learning objective we have not yet written down? And is there a theory of intelligence with computable bounds, in the sense that Shannon gave channel capacity and Solomonoff gave optimal prediction?

Software productivity scaled through layered abstraction: instruction sets, compilers, intermediate representations and libraries, each reused across millions of programs. Hardware design has kept a far wider productivity gap. A leading-edge ASIC still demands years of effort and large teams, verification consumes the majority of that effort, and errors found after tape-out are measured in mask sets and months. With the end of Dennard scaling and the slowdown of Moore's law, performance and efficiency now come from domain-specific architectures, which means more distinct designs at higher non-recurring engineering cost. Can hardware generators and compiler infrastructures such as Chisel, FIRRTL and CIRCT do for chip design what LLVM did for software? Which properties can be abstracted safely, and which inevitably leak upward: timing closure, power density, thermal limits, memory hierarchy, process variation? Can high-level synthesis produce results competitive in power, performance and area with hand-written RTL, and can formally verified, composable blocks remove the verification bottleneck? Can a design space of accelerators be explored automatically, as compilers explore schedules?

Every major information technology has changed what a society can know and how fast it can learn. Writing externalised memory; Socrates, in Plato's Phaedrus, objected that it would produce the appearance of wisdom without the substance. Printing, telegraphy and networked computing each shifted the cost of copying, transmitting and verifying information, and with it the structure of institutions. Dual-inheritance theory treats culture as a second evolutionary system, accumulating knowledge across generations faster than genes can. How do machine systems that generate, rank and summarise information alter that process? Do they act as a new transmission channel, a new selection pressure, or a new kind of participant? Human cognition evolved for groups of roughly 150, as Dunbar's number suggests, held together by reputation and shared narrative. How do trust, consensus and shared truth behave in networks of billions mediated by recommendation algorithms, where Goodhart's law applies to every metric we optimise? What does cognitive offloading to AI do to individual expertise and to the distributed, transactive memory a society relies on? And when automation changes the role of work in identity, status and social structure, which lessons from anthropology, psychology and economic history still apply?